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974ebe6349
This has no semantic changes. I find the new names slightly more logical and they match the names that are already used in XZ Embedded. The name fastpos wasn't changed (not worth the hassle).
142 lines
3.9 KiB
C
142 lines
3.9 KiB
C
///////////////////////////////////////////////////////////////////////////////
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//
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/// \file fastpos.h
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/// \brief Kind of two-bit version of bit scan reverse
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///
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// Authors: Igor Pavlov
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// Lasse Collin
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//
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// This file has been put into the public domain.
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// You can do whatever you want with this file.
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//
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///////////////////////////////////////////////////////////////////////////////
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#ifndef LZMA_FASTPOS_H
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#define LZMA_FASTPOS_H
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// LZMA encodes match distances by storing the highest two bits using
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// a six-bit value [0, 63], and then the missing lower bits.
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// Dictionary size is also stored using this encoding in the .xz
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// file format header.
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//
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// fastpos.h provides a way to quickly find out the correct six-bit
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// values. The following table gives some examples of this encoding:
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//
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// dist return
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// 0 0
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// 1 1
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// 2 2
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// 3 3
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// 4 4
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// 5 4
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// 6 5
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// 7 5
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// 8 6
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// 11 6
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// 12 7
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// ... ...
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// 15 7
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// 16 8
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// 17 8
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// ... ...
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// 23 8
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// 24 9
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// 25 9
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// ... ...
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//
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//
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// Provided functions or macros
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// ----------------------------
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//
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// get_dist_slot(dist) is the basic version. get_dist_slot_2(dist)
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// assumes that dist >= FULL_DISTANCES, thus the result is at least
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// FULL_DISTANCES_BITS * 2. Using get_dist_slot(dist) instead of
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// get_dist_slot_2(dist) would give the same result, but get_dist_slot_2(dist)
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// should be tiny bit faster due to the assumption being made.
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//
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//
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// Size vs. speed
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// --------------
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//
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// With some CPUs that have fast BSR (bit scan reverse) instruction, the
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// size optimized version is slightly faster than the bigger table based
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// approach. Such CPUs include Intel Pentium Pro, Pentium II, Pentium III
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// and Core 2 (possibly others). AMD K7 seems to have slower BSR, but that
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// would still have speed roughly comparable to the table version. Older
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// x86 CPUs like the original Pentium have very slow BSR; on those systems
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// the table version is a lot faster.
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//
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// On some CPUs, the table version is a lot faster when using position
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// dependent code, but with position independent code the size optimized
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// version is slightly faster. This occurs at least on 32-bit SPARC (no
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// ASM optimizations).
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//
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// I'm making the table version the default, because that has good speed
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// on all systems I have tried. The size optimized version is sometimes
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// slightly faster, but sometimes it is a lot slower.
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#ifdef HAVE_SMALL
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# define get_dist_slot(dist) \
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((dist) <= 4 ? (dist) : get_dist_slot_2(dist))
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static inline uint32_t
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get_dist_slot_2(uint32_t dist)
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{
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const uint32_t i = bsr32(dist);
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return (i + i) + ((dist >> (i - 1)) & 1);
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}
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#else
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#define FASTPOS_BITS 13
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extern const uint8_t lzma_fastpos[1 << FASTPOS_BITS];
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#define fastpos_shift(extra, n) \
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((extra) + (n) * (FASTPOS_BITS - 1))
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#define fastpos_limit(extra, n) \
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(UINT32_C(1) << (FASTPOS_BITS + fastpos_shift(extra, n)))
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#define fastpos_result(dist, extra, n) \
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lzma_fastpos[(dist) >> fastpos_shift(extra, n)] \
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+ 2 * fastpos_shift(extra, n)
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static inline uint32_t
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get_dist_slot(uint32_t dist)
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{
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// If it is small enough, we can pick the result directly from
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// the precalculated table.
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if (dist < fastpos_limit(0, 0))
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return lzma_fastpos[dist];
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if (dist < fastpos_limit(0, 1))
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return fastpos_result(dist, 0, 1);
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return fastpos_result(dist, 0, 2);
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}
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#ifdef FULL_DISTANCES_BITS
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static inline uint32_t
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get_dist_slot_2(uint32_t dist)
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{
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assert(dist >= FULL_DISTANCES);
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if (dist < fastpos_limit(FULL_DISTANCES_BITS - 1, 0))
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return fastpos_result(dist, FULL_DISTANCES_BITS - 1, 0);
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if (dist < fastpos_limit(FULL_DISTANCES_BITS - 1, 1))
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return fastpos_result(dist, FULL_DISTANCES_BITS - 1, 1);
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return fastpos_result(dist, FULL_DISTANCES_BITS - 1, 2);
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}
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#endif
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#endif
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#endif
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